Between the outer and inner loops sits a dq current limiter (the Idq limiter), and it is not an optional detail. It bounds the combined d-axis and q-axis current request so the converter’s total current capability is not exceeded. Depending on the model it may scale the whole current vector back, apply separate limits to each component, or enforce an active-versus-reactive priority — the exact rule is model-specific and should be checked. Either way it is the interface between what the outer loops would like and what the hardware can deliver, and it decides how the converter prioritises its current when dc-voltage support, reactive support and fault response all compete for the same limited capability.
That is why the limiter has a fault ride-through (FRT) input, and this is the strongest practical message of the page: during a fault the converter may need reactive current for voltage support, active current for dc-link control, and headroom for hardware protection all at once — and it cannot satisfy all three. The Idq limiter decides the feasible combination. The exact priority is grid-code- and model-dependent: some models prioritise reactive current during voltage dips, others preserve dc-link control or active current within limits. And because the GSC may then be unable to export all the incoming source power, the dc voltage can rise — so a dc chopper, active-power reduction, pitch action (wind), PV curtailment, converter blocking or protection may be needed, depending on the model, to keep the dc link safe.
In this generic model the choice is made by a threshold on the measured positive-sequence voltage. Under normal operation the limiter gives priority to active current \((i_{dg})\): the d-axis reference keeps its full share of the current budget and the reactive channel takes what is left, matching the everyday job of holding the dc link and exporting power. When \(V^{+}\) falls below a defined FRT-entry threshold \(V_{\text{FRT,on}}\), the FRT function reverses the priority to reactive current \((i_{qg})\) by swapping the d- and q-axis current limits, so voltage support is now served first and the active channel is capped with the remaining headroom. The swap is a discrete change driven by a single measured signal, which is one reason the positive-sequence estimate and the threshold value are worth checking — they set the exact voltage at which the converter flips from active-priority to reactive-priority behaviour.